Design of a scalable RSA and ECC crypto-processor

Ming Cheng Sun; Chih Pin Su; Chih Tsun Huang; Cheng Wen Wu

doi:10.1109/ASPDAC.2003.1195066

Design of a scalable RSA and ECC crypto-processor

Ming Cheng Sun, Chih Pin Su, Chih Tsun Huang, Cheng Wen Wu

電機工程學系

研究成果: Conference contribution

14 引文斯高帕斯（Scopus）

摘要

In this paper, we propose a scalable word-based crypto-processor that performs modular multiplication based on the modified Montgomery algorithm for finite fields GF(P) and GF(2^m). The unified crypto-processor supports scalable keys of length up to 2048 bits for RSA and 512 bits for elliptic curve cryptography (ECC). Further extension of the key length can be done easily by enlarging the memory module or using the external memory resource. With the proposed parity prediction technique, our pipelined crypto-processor achieves a 512-bit RSA encryption rate of 276 kbps and a 160-bit ECC encryption rate of 73.3 kbps for a 220 MHz clock rate.

原文	English
主出版物標題	Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	495-498
頁數	4
ISBN（電子）	0780376595
DOIs	https://doi.org/10.1109/ASPDAC.2003.1195066
出版狀態	Published - 2003 1月 1
事件	Asia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan 持續時間: 2003 1月 21 → 2003 1月 24

出版系列

名字	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
卷	2003-January

Other

Other	Asia and South Pacific Design Automation Conference, ASP-DAC 2003
國家/地區	Japan
城市	Kitakyushu
期間	03-01-21 → 03-01-24

All Science Journal Classification (ASJC) codes

電腦科學應用
電腦繪圖與電腦輔助設計
電氣與電子工程

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10.1109/ASPDAC.2003.1195066

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引用此

Sun, M. C., Su, C. P., Huang, C. T., & Wu, C. W. (2003). Design of a scalable RSA and ECC crypto-processor. 於 Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference (頁 495-498). 文章 1195066 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 卷 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2003.1195066

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title = "Design of a scalable RSA and ECC crypto-processor",

abstract = "In this paper, we propose a scalable word-based crypto-processor that performs modular multiplication based on the modified Montgomery algorithm for finite fields GF(P) and GF(2m). The unified crypto-processor supports scalable keys of length up to 2048 bits for RSA and 512 bits for elliptic curve cryptography (ECC). Further extension of the key length can be done easily by enlarging the memory module or using the external memory resource. With the proposed parity prediction technique, our pipelined crypto-processor achieves a 512-bit RSA encryption rate of 276 kbps and a 160-bit ECC encryption rate of 73.3 kbps for a 220 MHz clock rate.",

author = "Sun, {Ming Cheng} and Su, {Chih Pin} and Huang, {Chih Tsun} and Wu, {Cheng Wen}",

note = "Publisher Copyright: {\textcopyright} 2003 IEEE.; Asia and South Pacific Design Automation Conference, ASP-DAC 2003 ; Conference date: 21-01-2003 Through 24-01-2003",

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doi = "10.1109/ASPDAC.2003.1195066",

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Sun, MC, Su, CP, Huang, CT & Wu, CW 2003, Design of a scalable RSA and ECC crypto-processor. 於 Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference., 1195066, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 卷 2003-January, Institute of Electrical and Electronics Engineers Inc., 頁 495-498, Asia and South Pacific Design Automation Conference, ASP-DAC 2003, Kitakyushu, Japan, 03-01-21. https://doi.org/10.1109/ASPDAC.2003.1195066

Design of a scalable RSA and ECC crypto-processor. / Sun, Ming Cheng; Su, Chih Pin; Huang, Chih Tsun 等.
Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., 2003. p. 495-498 1195066 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 卷 2003-January).

研究成果: Conference contribution

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T1 - Design of a scalable RSA and ECC crypto-processor

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N2 - In this paper, we propose a scalable word-based crypto-processor that performs modular multiplication based on the modified Montgomery algorithm for finite fields GF(P) and GF(2m). The unified crypto-processor supports scalable keys of length up to 2048 bits for RSA and 512 bits for elliptic curve cryptography (ECC). Further extension of the key length can be done easily by enlarging the memory module or using the external memory resource. With the proposed parity prediction technique, our pipelined crypto-processor achieves a 512-bit RSA encryption rate of 276 kbps and a 160-bit ECC encryption rate of 73.3 kbps for a 220 MHz clock rate.

AB - In this paper, we propose a scalable word-based crypto-processor that performs modular multiplication based on the modified Montgomery algorithm for finite fields GF(P) and GF(2m). The unified crypto-processor supports scalable keys of length up to 2048 bits for RSA and 512 bits for elliptic curve cryptography (ECC). Further extension of the key length can be done easily by enlarging the memory module or using the external memory resource. With the proposed parity prediction technique, our pipelined crypto-processor achieves a 512-bit RSA encryption rate of 276 kbps and a 160-bit ECC encryption rate of 73.3 kbps for a 220 MHz clock rate.

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M3 - Conference contribution

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BT - Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference

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Design of a scalable RSA and ECC crypto-processor

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