Design of a scalable RSA and ECC crypto-processor

Ming Cheng Sun, Chih Pin Su, Chih Tsun Huang, Cheng Wen Wu

研究成果: Conference contribution

14 引文 斯高帕斯(Scopus)

摘要

In this paper, we propose a scalable word-based crypto-processor that performs modular multiplication based on the modified Montgomery algorithm for finite fields GF(P) and GF(2m). The unified crypto-processor supports scalable keys of length up to 2048 bits for RSA and 512 bits for elliptic curve cryptography (ECC). Further extension of the key length can be done easily by enlarging the memory module or using the external memory resource. With the proposed parity prediction technique, our pipelined crypto-processor achieves a 512-bit RSA encryption rate of 276 kbps and a 160-bit ECC encryption rate of 73.3 kbps for a 220 MHz clock rate.

原文English
主出版物標題Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference
發行者Institute of Electrical and Electronics Engineers Inc.
頁面495-498
頁數4
ISBN(電子)0780376595
DOIs
出版狀態Published - 2003 一月 1
事件Asia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan
持續時間: 2003 一月 212003 一月 24

出版系列

名字Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2003-January

Other

OtherAsia and South Pacific Design Automation Conference, ASP-DAC 2003
國家/地區Japan
城市Kitakyushu
期間03-01-2103-01-24

All Science Journal Classification (ASJC) codes

  • 電腦科學應用
  • 電腦繪圖與電腦輔助設計
  • 電氣與電子工程

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