@inproceedings{8dac48f28ce44df3ae88c9fe692d50e4,
title = "Design of AND and NAND logic gate using NDR-based circuit suitable for CMOS process",
abstract = "AND and NAND logic gate based on the negative differential resistance (NDR) device is demonstrated. This NDR device is made of metal-oxide-semiconductor field-effect-transistor (MOS) devices that could exhibit the NDR characteristic in the current-voltage curve by suitably arranging the MOS parameters. The devices and circuits are implemented by the standard 0.35μm CMOS process.",
author = "Liang, {Dong Shong} and Cheng-Chi Tai and Gan, {Kwang Jow} and Tsai, {Cher Shiung} and Chen, {Yaw Hwang}",
year = "2006",
month = dec,
day = "1",
doi = "10.1109/APCCAS.2006.342428",
language = "English",
isbn = "1424403871",
series = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",
pages = "1325--1328",
booktitle = "APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems",
note = "APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems ; Conference date: 04-12-2006 Through 06-12-2006",
}