Design of current-mode square-root domain band-pass filter with reduced voltage

Gwo Jeng Yu, Chun Yueh Huang, Jenn Jiun Chen, Bin Da Liu

研究成果: Article同行評審

5 引文 斯高帕斯(Scopus)

摘要

A design technique for current-mode square-root domain band-pass filter fabricated in a 0.25 μ m CMOS process is presented. The basic building block consists of current-mode current mirrors, square-root circuits and capacitors, and in which the overall supply voltage is reduced by adopting low-voltage level-shift current mirror. Both of the simulation and measured results, which are in good agreement, indicate that the prototype of the band-pass provides tunable center frequency of 4-10 MHz with bias-current-tunable, -26.7 dB total harmonic distortion (THD), and approximately 1.598 mW power dissipation with a 1.5 V supply voltage. Advantages of the proposed filter include high frequency operation, tuneability, low supply voltage operation, low power consumption, and low third order intermodulation distortion.

原文English
頁(從 - 到)239-250
頁數12
期刊Analog Integrated Circuits and Signal Processing
44
發行號3
DOIs
出版狀態Published - 2005 九月

All Science Journal Classification (ASJC) codes

  • 訊號處理
  • 硬體和架構
  • 表面、塗料和薄膜

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