Design of divider circuit for electrochemical impedance spectroscopy measurement system

Siang Wei Wang, Tse An Chen, Kuan Hung Chen, Chia Ling Wei

研究成果: Conference contribution

1 引文 斯高帕斯(Scopus)

摘要

In an electrochemical impedance spectroscopy (EIS) measurement system, it needs to calculate the amplitude ratio between the reference signal and measured signal, which reqiures a divider. In this work, a chip, which cosists of peak detectors, a divider and other signal processing circuits, was proposed for the EIS measurement system. This chip is capable of obtaining the amplitude ratio of reference to measured signals. The chip was fabricated by using a 0.35μm CMOS/MEMS 2P4M mixed-signal polycide process, and the frequency of the input frequency can range from 10 Hz to 10 kHz.

原文English
主出版物標題2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1-4
頁數4
ISBN(電子)9781538642603
DOIs
出版狀態Published - 2018 六月 5
事件2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018 - Hsinchu, Taiwan
持續時間: 2018 四月 162018 四月 19

出版系列

名字2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018

Other

Other2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018
國家/地區Taiwan
城市Hsinchu
期間18-04-1618-04-19

All Science Journal Classification (ASJC) codes

  • 安全、風險、可靠性和品質
  • 控制和優化
  • 硬體和架構
  • 電氣與電子工程

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