In this paper, a new technique, the Multiple-Phase Capacitor-Splitting Feedback Interchange (MP-CSFI) technique, is presented to reduce the harmonic distortion due to capacitor mismatch for pipelined ADCs. The basic idea is to split the capacitors in the sub-DACs of a pipelined ADC and dynamically select subsets of the split capacitors as the feedback ones during its operation such that the non-ideal effects caused by capacitors' mismatches can be disturbed and modulated to higher frequency band. A 12-bit, 35MHz pipelined A/D converter with the proposed technique is designed and simulated using the TSMC 0.25 μm 1P5M technology to demonstrate the effectiveness of this technique.
|出版狀態||Published - 2004 十二月 1|
|事件||2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan|
持續時間: 2004 十二月 6 → 2004 十二月 9
|Other||2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology|
|期間||04-12-06 → 04-12-09|
All Science Journal Classification (ASJC) codes