Designing self-testable cellular arrays

Cheng Wen Wu, Shyue Kung Lu

研究成果: Conference contribution

7 引文 斯高帕斯(Scopus)

摘要

We present design-for-testability techniques and built-in self-test structures for cellular arrays based on the M-testability condition, which results in the minimal number of tests. Our technique applies to arrays with arbitrary dimensions and various connections. A systolic array multiplier is given as an example, showing an overhead of only 4% for making it M-testable. Our method compares favorably with that based on pI-testability. It reduces drastically the testing costs for circuits realized as cellular arrays.

原文English
主出版物標題IEEE International Conference on Computer Design - VLSI in Computers and Processors
發行者Publ by IEEE
頁面110-113
頁數4
ISBN(列印)0818622709
出版狀態Published - 1991 十二月 1
事件Proceedings of the 1991 IEEE International Conference on Computer Design - VLSI in Computers and Processors - ICCD '91 - Cambridge, MA, USA
持續時間: 1991 十月 141991 十月 16

出版系列

名字IEEE International Conference on Computer Design - VLSI in Computers and Processors

Conference

ConferenceProceedings of the 1991 IEEE International Conference on Computer Design - VLSI in Computers and Processors - ICCD '91
城市Cambridge, MA, USA
期間91-10-1491-10-16

All Science Journal Classification (ASJC) codes

  • 硬體和架構
  • 電氣與電子工程

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