TY - GEN
T1 - Digital compensator design for power-aware dc-dc converters
AU - Liu, Chun Nan
AU - Yang, Chun Hung
AU - Tsai, Chien Hung
PY - 2010
Y1 - 2010
N2 - This paper presents a methodology to design a PID Digital Compensator for digital controller power electronics systems. This method is base on direct digital design and use on digital controller buck dc-dc converter. Crossover frequency and phase margin of close-loop system can be set by this method, and the integration coefficient in digital compensator set by this method can be avoid one of the LCO(Limit Cycle Oscillation) condition.
AB - This paper presents a methodology to design a PID Digital Compensator for digital controller power electronics systems. This method is base on direct digital design and use on digital controller buck dc-dc converter. Crossover frequency and phase margin of close-loop system can be set by this method, and the integration coefficient in digital compensator set by this method can be avoid one of the LCO(Limit Cycle Oscillation) condition.
UR - http://www.scopus.com/inward/record.url?scp=78651483189&partnerID=8YFLogxK
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U2 - 10.1109/ISAC.2010.5670475
DO - 10.1109/ISAC.2010.5670475
M3 - Conference contribution
AN - SCOPUS:78651483189
SN - 9781424483143
T3 - 2010 2nd International Symposium on Aware Computing, ISAC 2010 - Symposium Guide
SP - 177
EP - 180
BT - 2010 2nd International Symposium on Aware Computing, ISAC 2010 - Symposium Guide
T2 - 2010 2nd International Symposium on Aware Computing, ISAC 2010
Y2 - 1 November 2010 through 4 November 2010
ER -