Digital-signal-processor-based DC/AC inverter with integral-compensation terminal sliding-mode control

F. J. Chang, E. C. Chang, Tsorng-Juu Liang, Jiann-Fuh Chen

研究成果: Article

41 引文 斯高帕斯(Scopus)

摘要

Classic terminal sliding-mode control (TSMC) has finite system-state convergence time and is robust against system disturbances and uncertainties, but TSMC may suffer from steady-state error problems under disturbed-system conditions. This study proposes to improve the performance of TSMC by the addition of integral compensation, which eliminates steady-state errors in the DC/AC inverter. Thus, the proposed controller provides robust performance in controlling the DC/AC inverter output to track the sinusoidal reference at steady state, and also provides fast response under varying load conditions. A real-time digital-signal-processor-based laboratory prototype is implemented to confirm the theoretical analysis and effectiveness of the proposed controller.

原文English
頁(從 - 到)159-167
頁數9
期刊IET Power Electronics
4
發行號1
DOIs
出版狀態Published - 2011 一月 1

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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