Dual carrier traps related hysteresis in organic inverters with polyimide-modified gate-dielectrics

Wei Yang Chou, Bo Liang Yeh

研究成果: Article

5 引文 斯高帕斯(Scopus)

摘要

We integrated pentacene- and NN′ -diheptyl-3,4,9,10- perylenebiscarboximide-based transistors into an organic complementary metal oxide semiconductor (O-CMOS) whose gate-dielectric surface was modified by polyimide (PI). The hysteresis behaviors in metal-oxide-semiconductors, field-effect transistors, and O-CMOS were reported clearly. Measurements of hysteresis showed that the PI exhibited high trapping and detrapping speeds for charge carriers, including holes and electrons, to result in high performance transistors and O-CMOSs; moreover, the trapping and detrapping speeds were matched. Finally, a PI-modified organic inverter with little hysteresis, low static power dissipation, high noise margins, and switching voltage near V DD /2 was achieved simultaneously.

原文English
文章編號153302
期刊Applied Physics Letters
96
發行號15
DOIs
出版狀態Published - 2010 四月 12

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

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