Dual Path Binary Neural Network

Pei Yin Chen, Chi Huan Tang, Wei Ting Chen, Hui Liang Yu

研究成果: Conference contribution

摘要

Binary neural networks can effectively reduce the number of required parameters but might decrease the classification accuracy. To solve the problem, we propose a dual-path binary neural network (DPBNN) in this paper. Experimental results show that our DPBNN can outperform other traditional binary neural network in CIFAR-10 and SVHN dataset. The proposed network is simple, so it is suitable to be implemented on embedded systems or SoC designs.

原文English
主出版物標題Proceedings - 2019 International SoC Design Conference, ISOCC 2019
發行者Institute of Electrical and Electronics Engineers Inc.
頁面251-252
頁數2
ISBN(電子)9781728124780
DOIs
出版狀態Published - 2019 十月
事件16th International System-on-Chip Design Conference, ISOCC 2019 - Jeju, Korea, Republic of
持續時間: 2019 十月 62019 十月 9

出版系列

名字Proceedings - 2019 International SoC Design Conference, ISOCC 2019

Conference

Conference16th International System-on-Chip Design Conference, ISOCC 2019
國家Korea, Republic of
城市Jeju
期間19-10-0619-10-09

All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Electrical and Electronic Engineering
  • Instrumentation
  • Artificial Intelligence
  • Hardware and Architecture

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