This paper presents a fully integrated low-power 24 GHz phase lock loop (PLL) by using divide-by-5 prescaler for the multi-band applications. Injection-locked frequency divider (ILFD) with shunt-peaking technique is applied with a fourth-order harmonic injection, so divide-by-5 prescaler can be conducted. A dynamic control is proposed to bias the Vtune of the ILFD according to the VCO frequency to expand the locking range of the high-division-ratio dividers. This integrated circuit is fabricated by using the TSMC 1P6M CMOS 0.18 μm process. Compared with other PLLs with low phase noise, our proposed performance reached figure of merit (FOM) of 190 dBc/Hz after optimization, the phase noise are -110.0 (dBc/Hz) at 1 MHz frequency offset, respectively. The locking range extends from 0.7 GHz to 2.18 GHz.