Dynamic control to enhance locking range of divide-by-five prescaler for 24 GHz PLL

Chin-Lung Yang, Tzuen-Hsi Huang, Chieh Lun Chiang, Shao Ping Yu

研究成果: Conference contribution

摘要

This paper presents a fully integrated low-power 24 GHz phase lock loop (PLL) by using divide-by-5 prescaler for the multi-band applications. Injection-locked frequency divider (ILFD) with shunt-peaking technique is applied with a fourth-order harmonic injection, so divide-by-5 prescaler can be conducted. A dynamic control is proposed to bias the Vtune of the ILFD according to the VCO frequency to expand the locking range of the high-division-ratio dividers. This integrated circuit is fabricated by using the TSMC 1P6M CMOS 0.18 μm process. Compared with other PLLs with low phase noise, our proposed performance reached figure of merit (FOM) of 190 dBc/Hz after optimization, the phase noise are -110.0 (dBc/Hz) at 1 MHz frequency offset, respectively. The locking range extends from 0.7 GHz to 2.18 GHz.

原文English
主出版物標題2013 IEEE MTT-S International Microwave Symposium Digest, MTT 2013
DOIs
出版狀態Published - 2013 十二月 1
事件2013 IEEE MTT-S International Microwave Symposium Digest, MTT 2013 - Seattle, WA, United States
持續時間: 2013 六月 22013 六月 7

出版系列

名字IEEE MTT-S International Microwave Symposium Digest
ISSN(列印)0149-645X

Other

Other2013 IEEE MTT-S International Microwave Symposium Digest, MTT 2013
國家United States
城市Seattle, WA
期間13-06-0213-06-07

All Science Journal Classification (ASJC) codes

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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    Yang, C-L., Huang, T-H., Chiang, C. L., & Yu, S. P. (2013). Dynamic control to enhance locking range of divide-by-five prescaler for 24 GHz PLL. 於 2013 IEEE MTT-S International Microwave Symposium Digest, MTT 2013 [6697737] (IEEE MTT-S International Microwave Symposium Digest). https://doi.org/10.1109/MWSYM.2013.6697737