The mechanisms of hot-carrier-induced linear drain current (Idlin) degradation in a 0.35 μm n -type lateral diffused metal-oxide-semiconductor transistor, operating at a nominal voltage of 12 V, is investigated. Results and analysis show that the location of hot-carrier-induced interface states varies with stress gate voltage. Stress-induced interface states located in accumulation region under polygate have little effect on Idlin degradation. As a result, interface states located in drain-side spacer region dominate Idlin degradation when interface states located in channel region are negligible.
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