Effects of fin width on high-κ/metal gate bulk FinFET devices

Chien Hung Chen, Ying Chien Fang, Sheng-Yuan Chu

研究成果: Article

3 引文 斯高帕斯(Scopus)

摘要

The effects of silicon fin width on the electrostatic characteristics of high-κ/metal gate bulk fin field-effect transistor (FinFET) devices are investigated. Six devices with different layout fin widths and lengths are designed and fabricated. A technology computer-aided design (TCAD) simulation model with the proposed devices simplified as an equivalent circuit with three components (Cox, Cs and Rs) indicates that for a given layout area, a narrower fin width leads to a worse flat band voltage shift and larger variation of gate capacitance due to increased substrate resistance.

原文English
頁(從 - 到)1160-1162
頁數3
期刊Electronics Letters
50
發行號16
DOIs
出版狀態Published - 2014 七月 31

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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