Effects of Forming Gas Annealing and Channel Dimensions on the Electrical Characteristics of FeFETs and CMOS Inverter

Po Jung Sung, Chun Jung Su, Shih Hsuan Lo, Fu Kuo Hsueh, Darsen D. Lu, Yao Jen Lee, Tien Sheng Chao

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

In this study, ferroelectric FETs (FeFETs) and CMOS inverters are fabricated and analyzed, exhibiting 13% of 593 devices with sub-60 mV subthreshold swing (SS) at room temperature. Forming gas annealing (FGA) is found to not only enhance ferroelectricity but also significantly improve FeFET electrostatics. The experimental results indicate that FeFET with a narrow width shows weaker ferroelectric properties, and SS of sub-60 mV/dec with ID change less than two orders of magnitude. However, FeFET with a broad channel width reveals stronger ferroelectric properties, and SS of sub-60 mV/dec is over 2 orders of magnitude of Id. Finally, typical voltage transfer characteristics (VTCs) of a FeFET CMOS inverter with double sweeps at various VD from 0.6 to 2 V are demonstrated. The results show that hysteresis in a FeFET CMOS inverter could have both clockwise (CW) and counter-clockwise (CCW) loops.

原文English
文章編號9063644
頁(從 - 到)474-480
頁數7
期刊IEEE Journal of the Electron Devices Society
8
DOIs
出版狀態Published - 2020

All Science Journal Classification (ASJC) codes

  • Biotechnology
  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

指紋 深入研究「Effects of Forming Gas Annealing and Channel Dimensions on the Electrical Characteristics of FeFETs and CMOS Inverter」主題。共同形成了獨特的指紋。

引用此