Efficient deblocking filter architecture for H.264 video coders

Heng Yao Lin, Jwu Jin Yang, Bin Da Liu, Jar Ferr Yang

研究成果: Conference contribution

16 引文 斯高帕斯(Scopus)

摘要

In this paper, an efficient in-loop de-blocking filter architecture for H.264 video coding system is proposed. The deblocking filter usually need perform both vertical and horizontal directions. A novel data arrangement, called the Group-of-Pixel (GOP), is designed to efficiently arrange the pixel data stored in on-chip memory. With the proposed GOP arrangement, we do not need the transpose memory, which often occupies excessive chip area, to transpose the direction of the pixel data filtering. Furthermore, the number of total cycles required for GOP-based deblocking filter is reduced significantly. The proposed in-loop GOP-based deblocking filter architecture synthesized with UMC 0.18 μm technology could process real-time video in 720p HD (1280×720) format operated at 100 MHz.

原文English
主出版物標題ISCAS 2006
主出版物子標題2006 IEEE International Symposium on Circuits and Systems, Proceedings
頁面2617-2620
頁數4
出版狀態Published - 2006 十二月 1
事件ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece
持續時間: 2006 五月 212006 五月 24

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

Other

OtherISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
國家/地區Greece
城市Kos
期間06-05-2106-05-24

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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