Efficient probing schemes for fine-pitch pads of InFO wafer-level chip-scale package

Yu Chieh Huang, Bing Yang Lin, Cheng Wen Wu, Mincent Lee, Hao Chen, Hung Chih Lin, Ching Nen Peng, Min Jer Wang

研究成果: Conference contribution

2 引文 斯高帕斯(Scopus)


With the increasing demand of super high scale of integration and small form factor in advanced semiconductor products, especially those that integrate DRAM and logic dies, 3D IC and Wafer-Level Chip-Scale Packaging (WLCSP) are considered promising approaches. In Integrated Fan-Out (InFO) WLCSP, a large number of fine-pitch pads, where neighboring pads cannot be probed simultaneously due to insufficient pitch, are used as the contact interfaces of inter-die interconnections. If the fine-pitch pads cannot be probed, the interconnections between the pads and boundary scan cells (BSCs) cannot be tested, which can lead to higher defect level. From industrial investigation, untested fine-pitch pads lead to 1-2% test coverage loss. To improve the overall test coverage, in this paper, we propose a pre-bond probing methodology for fine-pitch pads of InFO WLCSP. By the proposed probing schemes, open/short faults on the interconnects between the fine-pitch pads and BSCs can be all tested by the ATE. Moreover, for short faults that only occur between adjacent pads (interconnects), we propose a grouping method to determine the test patterns at each probing stage, which can minimize the test time. We also show that our method can achieve 100% test coverage of open/short faults.

主出版物標題Proceedings of the 53rd Annual Design Automation Conference, DAC 2016
發行者Institute of Electrical and Electronics Engineers Inc.
出版狀態Published - 2016 六月 5
事件53rd Annual ACM IEEE Design Automation Conference, DAC 2016 - Austin, United States
持續時間: 2016 六月 52016 六月 9


名字Proceedings - Design Automation Conference


Conference53rd Annual ACM IEEE Design Automation Conference, DAC 2016
國家/地區United States

All Science Journal Classification (ASJC) codes

  • 電腦科學應用
  • 控制與系統工程
  • 電氣與電子工程
  • 建模與模擬


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