Efficient protocol converter generation for system integration

Der Wei Yang, Ming Der Shieh, Wen Hsuen Kuo, Jonas Wang

研究成果: Conference contribution

摘要

Integrate intellectual properties (IP's) designed for different protocols is always a troublesome task for system integrators. In this paper, we explore efficient methods to generate protocol converters automatically under the consideration of system performance. For the frequency/phase mismatch, we proposed a modified asynchronous FIFO together with our protocol converter. The generated results are verified in Synopsis Verification IP (VIP) environment. The performance and cost of the resulted converter are as efficient as the manual one, ARM Prime Cell.

原文English
主出版物標題Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
頁面903-906
頁數4
DOIs
出版狀態Published - 2010 十二月 1
事件2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia
持續時間: 2010 十二月 62010 十二月 9

出版系列

名字IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
國家/地區Malaysia
城市Kuala Lumpur
期間10-12-0610-12-09

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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