Efficient software-based self-test methods for embedded digital signal processors

Jun Jie Zhu, Wen Ching Lin, Jheng Hao Ye, Ming Der Shieh

研究成果: Conference contribution

摘要

Embedded processors are ubiquitous in today's system-on-chip design. In addition to designing digital signal processors (DSPs) for various applications, developing efficient test methods with little overhead and desired fault coverage for DSPs are also crucial and practical. Compared with the scan based test methods, the software-based self-test (SBST) method does not suffer from area overhead and performance degradation, and can provide at-speed test for DSPs with the potential drawbacks of lower fault coverage and a larger amount of test vectors. This paper explores techniques to improve the fault coverage of SBST methods for the developed DSP core with instructions fully compatible with those of the TI TMS320C54x. Experimental results exhibit that applying the developed SBST test flow obtains more than 96% fault coverage for our DSP core, which is higher than the reported values in related works.

原文English
主出版物標題Proceedings of the 18th Asian Test Symposium, ATS 2009
頁面206-211
頁數6
DOIs
出版狀態Published - 2009 十二月 1
事件18th Asian Test Symposium, ATS 2009 - Taichung, Taiwan
持續時間: 2009 十一月 232009 十一月 26

出版系列

名字Proceedings of the Asian Test Symposium
ISSN(列印)1081-7735

Other

Other18th Asian Test Symposium, ATS 2009
國家/地區Taiwan
城市Taichung
期間09-11-2309-11-26

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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