Efficient VLSI Architecture for Edge-Oriented Demosaicking

Chih Yuan Lien, Fu Jhong Yang, Pei Yin Chen, Yi Wen Fang

研究成果: Article同行評審

14 引文 斯高帕斯(Scopus)

摘要

Color filter array interpolation, also known as demosaicking and 'debayering,' is a crucial process for image reconstruction in digital still cameras. This paper presents an edge-oriented demosaicking method and an efficient very-large-scale integration (VLSI) architecture for color interpolation. The design uses simple operations (addition, subtraction, shift, and comparator) and nearest neighboring pixels to catch the color difference and edges. The required line buffering of the proposed design is four lines; therefore, its hardware cost is low. Our extensive experiments revealed that the proposed technique preserved edge features and exhibited excellent quantitative evaluation and visual quality performances. Compared with the previous VLSI implementations, the proposed design achieved superior image qualities. The synthesis results revealed that by using Taiwan Semiconductor Manufacturing Company 0.18- μ m technology, the proposed design yields a processing rate of approximately 200M samples per second.

原文English
文章編號7896513
頁(從 - 到)2038-2047
頁數10
期刊IEEE Transactions on Circuits and Systems for Video Technology
28
發行號8
DOIs
出版狀態Published - 2018 8月

All Science Journal Classification (ASJC) codes

  • 媒體技術
  • 電氣與電子工程

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