Embedded march algorithm test pattern generator for memory testing

Wei Lun Wang, Kuen-Jong Lee, Jhing Fa Wang

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)


The memory cores are essential for a system-on-a-chip (SOC). To test the memory cores, in this paper we propose a generalized embedded test pattern generator for any march algorithm. Without loss of functionality of the march algorithm, we also present a systematic procedure with a short time complexity to reduce the hardware cost of the test pattern generator.

頁(從 - 到)211-214
期刊International Symposium on VLSI Technology, Systems, and Applications, Proceedings
出版狀態Published - 1999

All Science Journal Classification (ASJC) codes

  • 工程 (全部)


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