TY - GEN
T1 - Enabling sub-blocks erase management to boost the performance of 3D NAND flash memory
AU - Chen, Tseng Yi
AU - Chang, Yuan Hao
AU - Ho, Chien Chung
AU - Chen, Shuo Han
N1 - Publisher Copyright:
© 2016 ACM.
PY - 2016/6/5
Y1 - 2016/6/5
N2 - 3D NAND has been proposed to provide a large capacity storage with low-cost consideration due to its high density memory architecture. However, 3D NAND needs to consume enormous time for garbage collection because of live-page copying overhead and long block erase time. To alleviate the impact of live-page copying on the performance of 3D NAND, a sub-block erase design has been designed. With sub-block erase design, this paper proposes a performance booster strategy to extremely boost the performance of garbage collection. As experimental results shows, the proposed strategy has a significant improvement on the average response time.
AB - 3D NAND has been proposed to provide a large capacity storage with low-cost consideration due to its high density memory architecture. However, 3D NAND needs to consume enormous time for garbage collection because of live-page copying overhead and long block erase time. To alleviate the impact of live-page copying on the performance of 3D NAND, a sub-block erase design has been designed. With sub-block erase design, this paper proposes a performance booster strategy to extremely boost the performance of garbage collection. As experimental results shows, the proposed strategy has a significant improvement on the average response time.
UR - http://www.scopus.com/inward/record.url?scp=84977138436&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84977138436&partnerID=8YFLogxK
U2 - 10.1145/2897937.2898018
DO - 10.1145/2897937.2898018
M3 - Conference contribution
AN - SCOPUS:84977138436
T3 - Proceedings - Design Automation Conference
BT - Proceedings of the 53rd Annual Design Automation Conference, DAC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 53rd Annual ACM IEEE Design Automation Conference, DAC 2016
Y2 - 5 June 2016 through 9 June 2016
ER -