Enhancement of programming speed on gate-all-around poly-silicon nanowire nonvolatile memory using self-aligned NiSi Schottky barrier source/drain

Ching Yuan Ho, Yaw Jen Chang, Y. L. Chiou

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

The programming characteristics of gate-all-around silicon-oxide-nitride- oxide silicon (SONOS) nonvolatile memories are presented using NiSi/poly-Si nanowires (SiNW) Schottky barrier (SB) heterojunctions. The non-uniform thermal stress distribution on SiNW channels due to joule heating affected the carrier transport behavior. Under a high drain voltage, impact ionization was found as a large lateral field enhances carrier velocity. As gate voltage (Vg) increased, the difference in the drain current within a range of various temperature conditions can be mitigated because a high gate field lowers the SB height of a NiSi source/SiNW/NiSi drain junction to ensure efficient hot-carrier generation. By applying the Fowler-Nordheim programming voltage to the SONOS nanowire memory, the SB height (Φn = 0.34 eV) could be reduced by image force; thus, hot electrons could be injected from SB source/drain electrodes into the SiN storage node. To compare both SiNW and Si nanocrystal SONOS devices, the SB SiNW SONOS device was characterized experimentally to propose a wider threshold-voltage window, exhibiting efficient programming characteristics.

原文English
文章編號054503
期刊Journal of Applied Physics
114
發行號5
DOIs
出版狀態Published - 2013 8月 7

All Science Journal Classification (ASJC) codes

  • 一般物理與天文學

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