Evaluation of interface property and DC characteristics enhancement in nanoscale n-channel metal-oxide-semiconductor field-effect transistor using stress memorization technique

Po Chin Huang, San Lein Wu, Shoou Jinn Chang, Yao Tsung Huang, Cheng Wen Kuo, Ching Yao Chang, Yao Chin Cheng, Osbert Cheng

研究成果: Article同行評審

摘要

In this letter, the advanced 40 nm technology n-channel metal-oxide-semiconductor field-effect transistor devices using the stress memorization technique (SMT) are presented. We demonstrate that SMT process would not affect the electrical characteristics of devices and can introduce higher tensile stress on channels, which enhances drive current. Through charge pumping measurement, it can be verified that SMT does not affect Si/SiO a2 interface quality. Moreover, SMT-induced higher tensile stress decreases not only scattering coefficient but also tunneling attenuation length, resulting in smaller input-referred noise, which represents an intrinsic advantage of low-frequency noise performance.

原文English
文章編號090207
期刊Japanese journal of applied physics
49
發行號9 PART 1
DOIs
出版狀態Published - 2010 九月

All Science Journal Classification (ASJC) codes

  • 工程 (全部)
  • 物理與天文學 (全部)

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