Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices

Chien Hung Chen; Yiming Li; Chieh Yang Chen; Yu Yu Chen; Sheng Chia Hsu; Wen Tsung Huang; Sheng-Yuan Chu

doi:10.1109/NANO.2013.6721026

Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices

Chien Hung Chen, Yiming Li, Chieh Yang Chen, Yu Yu Chen, Sheng Chia Hsu, Wen Tsung Huang, Sheng-Yuan Chu

研究成果: Conference contribution

摘要

In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔV_fb) and density of interface traps (D _it) have around 50% improvement.

原文	English
主出版物標題	2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
頁面	1168-1171
頁數	4
DOIs	https://doi.org/10.1109/NANO.2013.6721026
出版狀態	Published - 2013 12月 1
事件	2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 - Beijing, China 持續時間: 2013 8月 5 → 2013 8月 8

出版系列

名字	Proceedings of the IEEE Conference on Nanotechnology
ISSN（列印）	1944-9399
ISSN（電子）	1944-9380

Other

Other	2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
國家/地區	China
城市	Beijing
期間	13-08-05 → 13-08-08

All Science Journal Classification (ASJC) codes

生物工程
電氣與電子工程
材料化學
凝聚態物理學

存取文件

10.1109/NANO.2013.6721026

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引用此

Chen, C. H., Li, Y., Chen, C. Y., Chen, Y. Y., Hsu, S. C., Huang, W. T., & Chu, S.-Y. (2013). Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices. 於 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 (頁 1168-1171). 文章 6721026 (Proceedings of the IEEE Conference on Nanotechnology). https://doi.org/10.1109/NANO.2013.6721026

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title = "Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices",

abstract = "In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50% improvement.",

author = "Chen, {Chien Hung} and Yiming Li and Chen, {Chieh Yang} and Chen, {Yu Yu} and Hsu, {Sheng Chia} and Huang, {Wen Tsung} and Sheng-Yuan Chu",

year = "2013",

month = dec,

day = "1",

doi = "10.1109/NANO.2013.6721026",

language = "English",

isbn = "9781479906758",

series = "Proceedings of the IEEE Conference on Nanotechnology",

pages = "1168--1171",

booktitle = "2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013",

note = "2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 ; Conference date: 05-08-2013 Through 08-08-2013",

}

Chen, CH, Li, Y, Chen, CY, Chen, YY, Hsu, SC, Huang, WT & Chu, S-Y 2013, Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices. 於 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013., 6721026, Proceedings of the IEEE Conference on Nanotechnology, 頁 1168-1171, 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013, Beijing, China, 13-08-05. https://doi.org/10.1109/NANO.2013.6721026

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T1 - Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices

AU - Chen, Chien Hung

AU - Li, Yiming

AU - Chen, Chieh Yang

AU - Chen, Yu Yu

AU - Hsu, Sheng Chia

AU - Huang, Wen Tsung

AU - Chu, Sheng-Yuan

PY - 2013/12/1

Y1 - 2013/12/1

N2 - In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50% improvement.

AB - In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50% improvement.

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M3 - Conference contribution

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T3 - Proceedings of the IEEE Conference on Nanotechnology

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BT - 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013

T2 - 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013

Y2 - 5 August 2013 through 8 August 2013

ER -

Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices

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