Extraction and Analysis of Interface States in 50-nm nand Flash Devices

A method to extract the interface states (N{\rm it}) located in the center area (center N_{\rm it}) and the N_{\rm it} located in the corner region (corner N_{\rm it}) of nand Flash devices is presented in this paper. This N_{\rm it} extraction method is based on a careful combination of charge-pumping current data, technology computer-aided-design simulation results, and the 'control gate (CG)-modulated corner effect,' where 'CG-modulated corner effect' refers to the fact that the electron density in the corner region of the transistor is greatly affected by the bias applied to CG. Using this N_{\rm it} extraction method, the amounts of center N _{\rm it} and corner N_{\rm it} of a given nand Flash device can be analyzed. In addition, among devices with various widths of active area, the narrower width device showing worse corner N_{\rm it} can be demonstrated. Furthermore, the generation of center N_{\rm it} and corner N_{\rm it} for a device under program/erase cycle stress is explored. Our N_{\rm it} extraction method will be useful to analyze not only the characteristics of fresh nand Flash devices but also the reliability of aged nand Flash devices.