Fabrication of omega-gated negative capacitance finfets and SRAM

P. J. Sung, C. J. Su, D. D. Lu, S. X. Luo, K. H. Kao, J. Y. Ciou, C. Y. Jao, H. S. Hsu, C. J. Wang, T. C. Hong, T. H. Liao, C. C. Fang, Y. S. Wang, H. F. Huang, J. H. Li, Y. C. Huang, F. K. Hsueh, C. T. Wu, W. C.Y. Ma, K. P. HuangY. J. Lee, T. S. Chao, J. Y. Li, W. F. Wu, W. K. Yeh, Y. H. Wang

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

Omega-gated negative capacitance (NC) FinFETs, CMOS inverters and SRAM are fabricated and analyzed. Forming gas annealing (FGA) is performed and found to not only enhance ferroelectricity (FE) but also the NCFET electrostatics, in terms of higher \mathrm{I}-{\mathrm{ON}}, smaller hysteresis and subthreshold slop (SS). The SS is less than 60 mV/dec for both N-FinFET and P-FinFET in this work. Moreover, the CMOS inverter shows more symmetric and larger voltage gain after FGA.

原文English
主出版物標題2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781728109428
DOIs
出版狀態Published - 2019 四月
事件2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 - Hsinchu, Taiwan
持續時間: 2019 四月 222019 四月 25

出版系列

名字2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

Conference

Conference2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
國家Taiwan
城市Hsinchu
期間19-04-2219-04-25

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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