Fabrication of omega-gated negative capacitance finfets and SRAM

P. J. Sung; C. J. Su; D. D. Lu; S. X. Luo; K. H. Kao; J. Y. Ciou; C. Y. Jao; H. S. Hsu; C. J. Wang; T. C. Hong; T. H. Liao; C. C. Fang; Y. S. Wang; H. F. Huang; J. H. Li; Y. C. Huang; F. K. Hsueh; C. T. Wu; W. C.Y. Ma; K. P. Huang; Y. J. Lee; T. S. Chao; J. Y. Li; W. F. Wu; W. K. Yeh; Y. H. Wang

doi:10.1109/VLSI-TSA.2019.8804663

Fabrication of omega-gated negative capacitance finfets and SRAM

P. J. Sung
, C. J. Su
, D. D. Lu
, S. X. Luo
, K. H. Kao
, J. Y. Ciou
, C. Y. Jao
, H. S. Hsu
, C. J. Wang
, T. C. Hong
, T. H. Liao
, C. C. Fang
, Y. S. Wang
, H. F. Huang
, J. H. Li
, Y. C. Huang
, F. K. Hsueh
, C. T. Wu
, W. C.Y. Ma
, K. P. Huang

Y. J. Lee, T. S. Chao, J. Y. Li, W. F. Wu, W. K. Yeh, Y. H. Wang

研究成果: Conference contribution

5 引文斯高帕斯（Scopus）

摘要

Omega-gated negative capacitance (NC) FinFETs, CMOS inverters and SRAM are fabricated and analyzed. Forming gas annealing (FGA) is performed and found to not only enhance ferroelectricity (FE) but also the NCFET electrostatics, in terms of higher \mathrm{I}-{\mathrm{ON}}, smaller hysteresis and subthreshold slop (SS). The SS is less than 60 mV/dec for both N-FinFET and P-FinFET in this work. Moreover, the CMOS inverter shows more symmetric and larger voltage gain after FGA.

原文	English
主出版物標題	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9781728109428
DOIs	https://doi.org/10.1109/VLSI-TSA.2019.8804663
出版狀態	Published - 2019 4月
事件	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 - Hsinchu, Taiwan 持續時間: 2019 4月 22 → 2019 4月 25

出版系列

名字	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

Conference

Conference	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
國家/地區	Taiwan
城市	Hsinchu
期間	19-04-22 → 19-04-25

All Science Journal Classification (ASJC) codes

硬體和架構
電氣與電子工程
電子、光磁材料

存取文件

10.1109/VLSI-TSA.2019.8804663

其它文件與鏈接

引用此

Sung, P. J., Su, C. J., Lu, D. D., Luo, S. X., Kao, K. H., Ciou, J. Y., Jao, C. Y., Hsu, H. S., Wang, C. J., Hong, T. C., Liao, T. H., Fang, C. C., Wang, Y. S., Huang, H. F., Li, J. H., Huang, Y. C., Hsueh, F. K., Wu, C. T., Ma, W. C. Y., ... Wang, Y. H. (2019). Fabrication of omega-gated negative capacitance finfets and SRAM. 於 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 文章 8804663 (2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2019.8804663

@inproceedings{2be1bcb3584d494dbee43fade2be0d76,

title = "Fabrication of omega-gated negative capacitance finfets and SRAM",

abstract = "Omega-gated negative capacitance (NC) FinFETs, CMOS inverters and SRAM are fabricated and analyzed. Forming gas annealing (FGA) is performed and found to not only enhance ferroelectricity (FE) but also the NCFET electrostatics, in terms of higher \textbackslash{}mathrm\{I\}-\{\textbackslash{}mathrm\{ON\}\}, smaller hysteresis and subthreshold slop (SS). The SS is less than 60 mV/dec for both N-FinFET and P-FinFET in this work. Moreover, the CMOS inverter shows more symmetric and larger voltage gain after FGA.",

author = "Sung, \{P. J.\} and Su, \{C. J.\} and Lu, \{D. D.\} and Luo, \{S. X.\} and Kao, \{K. H.\} and Ciou, \{J. Y.\} and Jao, \{C. Y.\} and Hsu, \{H. S.\} and Wang, \{C. J.\} and Hong, \{T. C.\} and Liao, \{T. H.\} and Fang, \{C. C.\} and Wang, \{Y. S.\} and Huang, \{H. F.\} and Li, \{J. H.\} and Huang, \{Y. C.\} and Hsueh, \{F. K.\} and Wu, \{C. T.\} and Ma, \{W. C.Y.\} and Huang, \{K. P.\} and Lee, \{Y. J.\} and Chao, \{T. S.\} and Li, \{J. Y.\} and Wu, \{W. F.\} and Yeh, \{W. K.\} and Wang, \{Y. H.\}",

year = "2019",

month = apr,

doi = "10.1109/VLSI-TSA.2019.8804663",

language = "English",

series = "2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019",

address = "United States",

note = "2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 ; Conference date: 22-04-2019 Through 25-04-2019",

}

Sung, PJ, Su, CJ, Lu, DD, Luo, SX, Kao, KH, Ciou, JY, Jao, CY, Hsu, HS, Wang, CJ, Hong, TC, Liao, TH, Fang, CC, Wang, YS, Huang, HF, Li, JH, Huang, YC, Hsueh, FK, Wu, CT, Ma, WCY, Huang, KP, Lee, YJ, Chao, TS, Li, JY, Wu, WF, Yeh, WK & Wang, YH 2019, Fabrication of omega-gated negative capacitance finfets and SRAM. 於 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019., 8804663, 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019, Institute of Electrical and Electronics Engineers Inc., 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019, Hsinchu, Taiwan, 19-04-22. https://doi.org/10.1109/VLSI-TSA.2019.8804663

Fabrication of omega-gated negative capacitance finfets and SRAM. / Sung, P. J.; Su, C. J.; Lu, D. D. 等.
2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 8804663 (2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019).

研究成果: Conference contribution

TY - GEN

T1 - Fabrication of omega-gated negative capacitance finfets and SRAM

AU - Sung, P. J.

AU - Su, C. J.

AU - Lu, D. D.

AU - Luo, S. X.

AU - Kao, K. H.

AU - Ciou, J. Y.

AU - Jao, C. Y.

AU - Hsu, H. S.

AU - Wang, C. J.

AU - Hong, T. C.

AU - Liao, T. H.

AU - Fang, C. C.

AU - Wang, Y. S.

AU - Huang, H. F.

AU - Li, J. H.

AU - Huang, Y. C.

AU - Hsueh, F. K.

AU - Wu, C. T.

AU - Ma, W. C.Y.

AU - Huang, K. P.

AU - Lee, Y. J.

AU - Chao, T. S.

AU - Li, J. Y.

AU - Wu, W. F.

AU - Yeh, W. K.

AU - Wang, Y. H.

PY - 2019/4

Y1 - 2019/4

N2 - Omega-gated negative capacitance (NC) FinFETs, CMOS inverters and SRAM are fabricated and analyzed. Forming gas annealing (FGA) is performed and found to not only enhance ferroelectricity (FE) but also the NCFET electrostatics, in terms of higher \mathrm{I}-{\mathrm{ON}}, smaller hysteresis and subthreshold slop (SS). The SS is less than 60 mV/dec for both N-FinFET and P-FinFET in this work. Moreover, the CMOS inverter shows more symmetric and larger voltage gain after FGA.

AB - Omega-gated negative capacitance (NC) FinFETs, CMOS inverters and SRAM are fabricated and analyzed. Forming gas annealing (FGA) is performed and found to not only enhance ferroelectricity (FE) but also the NCFET electrostatics, in terms of higher \mathrm{I}-{\mathrm{ON}}, smaller hysteresis and subthreshold slop (SS). The SS is less than 60 mV/dec for both N-FinFET and P-FinFET in this work. Moreover, the CMOS inverter shows more symmetric and larger voltage gain after FGA.

UR - https://www.scopus.com/pages/publications/85072101546

UR - https://www.scopus.com/pages/publications/85072101546#tab=citedBy

U2 - 10.1109/VLSI-TSA.2019.8804663

DO - 10.1109/VLSI-TSA.2019.8804663

M3 - Conference contribution

T3 - 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

BT - 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

Y2 - 22 April 2019 through 25 April 2019

ER -

Sung PJ, Su CJ, Lu DD, Luo SX, Kao KH, Ciou JY 等. Fabrication of omega-gated negative capacitance finfets and SRAM. 於 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 8804663. (2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019). doi: 10.1109/VLSI-TSA.2019.8804663

Fabrication of omega-gated negative capacitance finfets and SRAM

摘要

出版系列

Conference

All Science Journal Classification (ASJC) codes

存取文件

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