Failure Mechanism Analysis of SiC MOSFETs in Unclamped Inductive Switching Conditions

Na Ren, Kang L. Wang, Jiupeng Wu, Hongyi Xu, Kuang Sheng

研究成果: Conference contribution

6 引文 斯高帕斯(Scopus)

摘要

In this work, avalanche ruggedness and failure mechanism of SiC MOSFET in single-pulse Unclamped Inductive Switching (UIS) tests are investigated and compared with that of Si IGBT. The experimental results show that the avalanche energy of SiC MOSFET is only 30% that of Si IGBT due to the much smaller chip size (1/7 that of Si IGBT). To improve the avalanche capability of SiC MOSFET, the failure mechanism is analyzed. First, junction temperature in the UIS test is calculated through modeling. The maximum junction temperatures reach 650 K and 490 K in SiC MOSFET and Si IGBT, respectively. Then, BJT latch-up probability is analyzed with an analytical model. It is demonstrated that BJT latch-up can be triggered at the failure temperature (650 K) in SiC MOSFET, whereas it can be eliminated in Si IGBT due to the much deeper P+ body structure. Based on the analyses, the device structure optimization is proposed for SiC MOSFET to prevent the BJT latch-up and enable avalanche capability improvement.

原文English
主出版物標題2019 31st International Symposium on Power Semiconductor Devices and ICs, ISPSD 2019
發行者Institute of Electrical and Electronics Engineers Inc.
頁面183-186
頁數4
ISBN(電子)9781728105796
DOIs
出版狀態Published - 2019 五月
事件31st International Symposium on Power Semiconductor Devices and ICs, ISPSD 2019 - Shanghai, China
持續時間: 2019 五月 192019 五月 23

出版系列

名字Proceedings of the International Symposium on Power Semiconductor Devices and ICs
2019-May
ISSN(列印)1063-6854

Conference

Conference31st International Symposium on Power Semiconductor Devices and ICs, ISPSD 2019
國家China
城市Shanghai
期間19-05-1919-05-23

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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