First Demonstration of Vertical Stacked Hetero-Oriented n-Ge (111)/p-Ge (100) CFET toward Mobility Balance Engineering

X. R. Yu, W. H. Chang, T. C. Hong, P. J. Sung, A. Agarwal, G. L. Luo, C. T. Wu, K. H. Kao, C. J. Su, S. W. Chang, W. H. Lu, P. Y. Fu, J. H. Lin, P. H. Wu, T. C. Cho, W. C.Yu Ma, D. D. Lu, T. S. Chao, T. Maeda, Y. J. LeeW. F. Wu, W. K. Yeh, Y. H. Wang

研究成果: Conference contribution

4 引文 斯高帕斯(Scopus)

摘要

To solve the mobility balance issue in nanosheet FETs (NSFETs) and complementary FETs (CFETs), the aggressive approach using hetero-oriented integration with Ge channels was demonstrated by low temperature hetero-layer bonding technology (LT-HBT). Good manufacturability of the hetero-oriented Ge platform was verified with XRD 2?-? scan, Raman spectra, Selected Area Diffraction (SAD), and Converged Beam Electron Diffraction (CBED). Balanced device performance in terms of C-V, ID-VG, ID-VD and ?c for Ge (111) nFET and Ge (100) pFET was achieved, leading to better VTCs and voltage gains.

原文English
主出版物標題2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
發行者Institute of Electrical and Electronics Engineers Inc.
頁面399-400
頁數2
ISBN(電子)9781665497725
DOIs
出版狀態Published - 2022
事件2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 - Honolulu, United States
持續時間: 2022 6月 122022 6月 17

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
2022-June
ISSN(列印)0743-1562

Conference

Conference2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
國家/地區United States
城市Honolulu
期間22-06-1222-06-17

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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