FPGA realization of line-interactive uninterruptible power supply

Shyh-Jier Huang, Chia Hung Sun, Tsong Shing Lee

研究成果: Conference contribution

摘要

A novel design of line-interactive uninterruptible power supplies is proposed in this paper. In the designated circuit, by utilizing single-stage power converter, the system can be operated either in the active power filter mode or in the voltage-stabilizing mode based on the operating state of mains power. When the system is operated at the active power filter mode, both the harmonic reduction and reactive power compensation can be achieved via a set of current feedback signals. When the system is operated at the voltage-stabilizing mode, by deeming the capacitor current as the control variable, the first-order current control method can be formulated such that the system stability is maintained while the speed response is significantly improved, With the aid of the FPGA in the digital design, it is found that the hardware circuit can be realized within a shorter time and the design cost can be also lowered down. This proposed system has been validated by theoretical analysis and experimental realization. Test results support the feasibility of the proposed approach for the application considered.

原文English
主出版物標題5th International Conference on Power Electronics and Drive Systems, PEDS 2003 - Proceedings
編輯King-Jet Tseng
發行者Institute of Electrical and Electronics Engineers Inc.
頁面376-379
頁數4
ISBN(電子)0780378857
DOIs
出版狀態Published - 2003 1月 1
事件5th International Conference on Power Electronics and Drive Systems, PEDS 2003 - Singapore, Singapore
持續時間: 2003 11月 172003 11月 20

出版系列

名字Proceedings of the International Conference on Power Electronics and Drive Systems
1

Other

Other5th International Conference on Power Electronics and Drive Systems, PEDS 2003
國家/地區Singapore
城市Singapore
期間03-11-1703-11-20

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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