Generating compact test patterns for stuck-at faults and transition faults in one ATPG run

Yi Cheng Kung, Kuen Jong Lee, Sudhakar M. Reddy

研究成果: Conference contribution

5 引文 斯高帕斯(Scopus)

摘要

This paper presents a novel test pattern generation flow to detect stuck-at and transition faults simultaneously. Both fault models are transformed into a unified fault model for a proposed 2-time-frame circuit model. This makes it possible to generate patterns for both types of faults in one ATPG run with no need to modify the ATPG tool. A highly compact pattern set can thus be obtained which requires less test data volume and shorter test application time without degrading the fault coverage for either type of faults. Experimental results show that, compared to the conventional methods, the proposed method can reduce the total test pattern counts by up to 12.27% and 15.54% and test application times up to 12.06% and 15.58% for ISCAS'89 and ITC'99 circuits, respectively.

原文English
主出版物標題Proceedings - 2nd IEEE International Test Conference in Asia, ITC-Asia 2018
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1-6
頁數6
ISBN(列印)9781538651803
DOIs
出版狀態Published - 2018 九月 11
事件2nd IEEE International Test Conference in Asia, ITC-Asia 2018 - Harbin, China
持續時間: 2018 八月 152018 八月 17

出版系列

名字Proceedings - 2nd IEEE International Test Conference in Asia, ITC-Asia 2018

Other

Other2nd IEEE International Test Conference in Asia, ITC-Asia 2018
國家China
城市Harbin
期間18-08-1518-08-17

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

指紋 深入研究「Generating compact test patterns for stuck-at faults and transition faults in one ATPG run」主題。共同形成了獨特的指紋。

引用此