Graph matching-based algorithms for array-based FPGA segmentation design and routing

Jai Ming Lin, Song Ra Pan, Yao Wen Chang

研究成果: Conference contribution

2 引文 斯高帕斯(Scopus)

摘要

Architecture and CAD are closely related issues in FPGA design. Routing architecture design optimizes routability and facilitates router development; on the other hand, router design considers the specific properties of routing architectures to optimize the performance of the router. In this paper, we propose effective and efficient unified matching-based algorithms for array-based FPGA routing and segmentation design. For the segmentation design, we consider the similarity of input routing instances and formulate a net-matching problem to construct the optimal segmentation architecture. For the router design, we present a matching-based timing-driven routing algorithm which can consider a versatile set of routing segments. Experimental results show that our designed segmentations significantly outperform those used in commercially available FPGAs. For example, our designed segmentations achieve, on average, 14.6% and 19.7% improvements in routability, compared with those used in the Lucent Technologies ORCA 2C-series and the Xilinx XC4000E-series FPGAs, respectively.

原文English
主出版物標題Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference
發行者Institute of Electrical and Electronics Engineers Inc.
頁面851-854
頁數4
ISBN(電子)0780376595
DOIs
出版狀態Published - 2003 一月 1
事件Asia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan
持續時間: 2003 一月 212003 一月 24

出版系列

名字Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2003-January

Other

OtherAsia and South Pacific Design Automation Conference, ASP-DAC 2003
國家Japan
城市Kitakyushu
期間03-01-2103-01-24

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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    Lin, J. M., Pan, S. R., & Chang, Y. W. (2003). Graph matching-based algorithms for array-based FPGA segmentation design and routing. 於 Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference (頁 851-854). [1195136] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 卷 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2003.1195136