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Hardware design of an adaptive neuro-fuzzy network with on-chip learning capability

研究成果: Conference contribution

1   連結會在新分頁中開啟 引文 斯高帕斯(Scopus)

摘要

This paper aims for the development of the digital circuit of an adaptive neuro-fuzzy network with on-chip learning capability. The on-chip learning capability was realized by a backpropagation learning circuit for optimizing the network parameters. To maximize the throughput of the circuit and minimize its required resources, we proposed to reuse the computational results in both feedforward and backpropagation circuits. This leads to a simpler data flow and the reduction of resource consumption. To verify the effectiveness of the circuit, we implemented the circuit in an FPGA development board and compared the performance with the neuro-fuzzy system written in a MATLAB® code. The experimental results show that the throughput of our neuro-fuzzy circuit significantly outperforms the NF network written in a MATLAB® code with a satisfactory learning performance.

原文English
主出版物標題Advances in Neural Networks - ISNN 2007 - 4th International Symposium on Neural Networks, ISNN 2007, Proceedings
發行者Springer Verlag
頁面336-345
頁數10
版本PART 2
ISBN(列印)9783540723929
DOIs
出版狀態Published - 2007
事件4th International Symposium on Neural Networks, ISNN 2007 - Nanjing, China
持續時間: 2007 6月 32007 6月 7

出版系列

名字Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
號碼PART 2
4492 LNCS
ISSN(列印)0302-9743
ISSN(電子)1611-3349

Other

Other4th International Symposium on Neural Networks, ISNN 2007
國家/地區China
城市Nanjing
期間07-06-0307-06-07

All Science Journal Classification (ASJC) codes

  • 理論電腦科學
  • 一般電腦科學

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