TY - JOUR
T1 - Hardware implementation for a genetic algorithm
AU - Chen, Pei Yin
AU - Chen, Ren Der
AU - Chang, Yu Pin
AU - Shieh, Leang San
AU - Malki, H. A.
N1 - Funding Information:
Manuscript received May 9, 2007; revised October 25, 2007. This work was supported by the National Science Council, Republic of China, under Grant NSC-96-2221-E-006-027-MY3. P.-Y. Chen is with the Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan 701, Taiwan, R.O.C. (e-mail: [email protected]). R.-D. Chen is with the Department of Computer Science and Information Engineering, National Changhua University of Education, Changhua 500, Taiwan, R.O.C. Y.-P. Chang and H. A. Malki are with the Department of Engineering Technology, University of Houston, Houston, TX 77204-4083 USA. L.-S. Shieh is with the Department of Electrical and Computer Engineering, University of Houston, Houston, TX 77204-4005 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TIM.2007.913807
Funding Information:
The authors would like to thank Y.-M. Wang, C.-Y. Ke, and Y.-C. Xu for their help with the VLSI implementation of the proposed architecture. Also, the authors used shared facilities supported by the Program of Top 100 Universities Advancement, Ministry of Education, Taiwan, R.O.C.
PY - 2008/4
Y1 - 2008/4
N2 - A genetic algorithm (GA) can find an optimal solution in many complex problems. GAs have been widely used in many applications. A flexible-very-large-scale integration intellectual property for the GA has been proposed in this paper. This algorithm can dynamically perform various population sizes, fitness lengths, individual lengths, fitness functions, crossover operations, and mutation-rate settings to meet the real-time requirements of various GA applications. It can be seen from the simulation results that our design works very well for the three examples running at an 83-MHz clock frequency.
AB - A genetic algorithm (GA) can find an optimal solution in many complex problems. GAs have been widely used in many applications. A flexible-very-large-scale integration intellectual property for the GA has been proposed in this paper. This algorithm can dynamically perform various population sizes, fitness lengths, individual lengths, fitness functions, crossover operations, and mutation-rate settings to meet the real-time requirements of various GA applications. It can be seen from the simulation results that our design works very well for the three examples running at an 83-MHz clock frequency.
UR - http://www.scopus.com/inward/record.url?scp=41549141706&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=41549141706&partnerID=8YFLogxK
U2 - 10.1109/TIM.2007.913807
DO - 10.1109/TIM.2007.913807
M3 - Article
AN - SCOPUS:41549141706
SN - 0018-9456
VL - 57
SP - 699
EP - 705
JO - IEEE Transactions on Instrumentation and Measurement
JF - IEEE Transactions on Instrumentation and Measurement
IS - 4
ER -