Hardware/software codesign of resource constrained real-time systems

Chia Cheng Lo, Jung Guan Luo, Ming Der Shieh

研究成果: Conference contribution

摘要

System-level design methods can provide a systematic and effective way of evaluating various design options, thus shortening the product development time. This paper relaxes the HC algorithm by considering the K best candidates in each clustering iteration to alleviate the possibility of being trapped in local minimum during hardware/software (HW/SW) partition. We also present an architecture mapping algorithm together with the defined sensitivity measure to further reduce the hardware requirement. Simulation results show that the complexity of exploration time can be greatly reduced with only little performance loss as compared to the exhaustive search. The proposed algorithm can thus provide a good compromise between exploration time and accuracy.

原文English
主出版物標題5th International Conference on Information Assurance and Security, IAS 2009
頁面177-180
頁數4
DOIs
出版狀態Published - 2009 十二月 1
事件5th International Conference on Information Assurance and Security, IAS 2009 - Xian, China
持續時間: 2009 八月 182009 九月 20

出版系列

名字5th International Conference on Information Assurance and Security, IAS 2009
1

Other

Other5th International Conference on Information Assurance and Security, IAS 2009
國家/地區China
城市Xian
期間09-08-1809-09-20

All Science Journal Classification (ASJC) codes

  • 計算機理論與數學
  • 電腦科學應用
  • 硬體和架構
  • 軟體

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