High-speed rail-to-rail output buffer amplifier with dynamic-bias circuit

Chien-Hung Tsai, J. H. Wang, C. T. Chang, C. Y. Wang

研究成果: Article同行評審

3 引文 斯高帕斯(Scopus)

摘要

The design of a high-speed output buffer amplifier for driving the large column line loads of large-size TFT-LCDs is presented. The major circuit of the output buffer is a rail-to-rail current mirror amplifier which can control the class-AB output stage and auxiliary output stage at the same time. The proposed dynamic bias method not only increases the driving capability of the class-AB output stage but also maintains a small quiescent current path.

原文English
頁(從 - 到)1199-1200
頁數2
期刊Electronics Letters
45
發行號24
DOIs
出版狀態Published - 2009 十二月 1

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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