High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding

G. G. Lee; C. C. Lo; Y. C. Chen; H. Y. Lin; M. J. Wang

doi:10.1049/iet-ipr.2008.0064

High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding

G. G. Lee, C. C. Lo, Y. C. Chen, H. Y. Lin, M. J. Wang

電機工程學系

研究成果: Article › 同行評審

9 引文斯高帕斯（Scopus）

摘要

This study develops a low-cost very-large-scale-integration (VLSI) hardware architecture for entropy coding with increased throughput using the statistical properties of context-based adaptive variable-length coding (CAVLC) in AVC/H.264. Statistical analyses show that better symbol length prediction was achieved by breaking the recursive dependency among codewords for the multi-symbol decoder implementation. The proposed CAVLC decoder easily meets the real-time requirements for high definition (HD) (1920×1088) applications. The clock speed is only 13 MHz under the best case scenario.

原文	English
文章編號	IIPEAT000004000002000081000001
頁（從 - 到）	81-91
頁數	11
期刊	IET Image Processing
卷	4
發行號	2
DOIs	https://doi.org/10.1049/iet-ipr.2008.0064
出版狀態	Published - 2010 4月 1

All Science Journal Classification (ASJC) codes

軟體
訊號處理
電腦視覺和模式識別
電氣與電子工程

存取文件

10.1049/iet-ipr.2008.0064

其它文件與鏈接

引用此

@article{ec67984b4cad4886b58fc0e97ce301a4,

title = "High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding",

abstract = "This study develops a low-cost very-large-scale-integration (VLSI) hardware architecture for entropy coding with increased throughput using the statistical properties of context-based adaptive variable-length coding (CAVLC) in AVC/H.264. Statistical analyses show that better symbol length prediction was achieved by breaking the recursive dependency among codewords for the multi-symbol decoder implementation. The proposed CAVLC decoder easily meets the real-time requirements for high definition (HD) (1920×1088) applications. The clock speed is only 13 MHz under the best case scenario.",

author = "Lee, {G. G.} and Lo, {C. C.} and Chen, {Y. C.} and Lin, {H. Y.} and Wang, {M. J.}",

year = "2010",

month = apr,

day = "1",

doi = "10.1049/iet-ipr.2008.0064",

language = "English",

volume = "4",

pages = "81--91",

journal = "IET Image Processing",

issn = "1751-9659",

publisher = "Institution of Engineering and Technology",

number = "2",

}

TY - JOUR

T1 - High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding

AU - Lee, G. G.

AU - Lo, C. C.

AU - Chen, Y. C.

AU - Lin, H. Y.

AU - Wang, M. J.

PY - 2010/4/1

Y1 - 2010/4/1

N2 - This study develops a low-cost very-large-scale-integration (VLSI) hardware architecture for entropy coding with increased throughput using the statistical properties of context-based adaptive variable-length coding (CAVLC) in AVC/H.264. Statistical analyses show that better symbol length prediction was achieved by breaking the recursive dependency among codewords for the multi-symbol decoder implementation. The proposed CAVLC decoder easily meets the real-time requirements for high definition (HD) (1920×1088) applications. The clock speed is only 13 MHz under the best case scenario.

AB - This study develops a low-cost very-large-scale-integration (VLSI) hardware architecture for entropy coding with increased throughput using the statistical properties of context-based adaptive variable-length coding (CAVLC) in AVC/H.264. Statistical analyses show that better symbol length prediction was achieved by breaking the recursive dependency among codewords for the multi-symbol decoder implementation. The proposed CAVLC decoder easily meets the real-time requirements for high definition (HD) (1920×1088) applications. The clock speed is only 13 MHz under the best case scenario.

UR - http://www.scopus.com/inward/record.url?scp=77953492105&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77953492105&partnerID=8YFLogxK

U2 - 10.1049/iet-ipr.2008.0064

DO - 10.1049/iet-ipr.2008.0064

M3 - Article

AN - SCOPUS:77953492105

SN - 1751-9659

VL - 4

SP - 81

EP - 91

JO - IET Image Processing

JF - IET Image Processing

IS - 2

M1 - IIPEAT000004000002000081000001

ER -

High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding

摘要

All Science Journal Classification (ASJC) codes

存取文件

其它文件與鏈接

指紋

引用此