摘要
Among the emerging types of memory, resistive random-access memory (ReRAM) units offer faster write speeds and consume less power than those of flash memory units. With the advancement of 3-D stack technology, 3-D nonvolatile memories (NVMs) are under active development to satisfy the requirements of new applications. This brief proposes a 1.5 F2/bit nonlinear sub-teraohm vertical ReRAM (V-ReRAM) and a sensing ultrahigh-resistance read scheme that not only accurately senses sub-picoampere currents but also reduces sneak current effects. A 2-Kb V-ReRAM macro unit was fabricated using a 0.15-μ m CMOS process and the Industrial Technology Research Institute's zero-transistor-four-ReRAM V-ReRAM back-end-of-line process. The proposed read scheme increased the sensing margin by eight times when compared with the current-mirror type, a commonly used read scheme for NVMs. Additionally, the memory bit size was smaller than one-transistor-N-ReRAM V-ReRAM.
原文 | English |
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文章編號 | 8123866 |
頁(從 - 到) | 1234-1238 |
頁數 | 5 |
期刊 | IEEE Transactions on Circuits and Systems II: Express Briefs |
卷 | 65 |
發行號 | 9 |
DOIs | |
出版狀態 | Published - 2018 9月 |
All Science Journal Classification (ASJC) codes
- 電氣與電子工程