How to enable software isolation and boost system performance with sub-block erase over 3D flash memory

Hsin Yu Chang, Chien Chung Ho, Yuan Hao Chang, Yu Ming Chang, Tei Wei Kuo

研究成果: Conference contribution

7 引文 斯高帕斯(Scopus)

摘要

The write amplification problem deteriorates as the block size of modern flash-memory chips keeps increasing. Without the careful garbage collection, significant live-page copying might even worsen the reliability problem, that is already severe to 3D flash memory. In this work, we propose a sub-block erase design to not only alleviate the write amplification problem by reducing live-page copying but also improve the system reliability with a software isolation strategy. In particular, sub-blocks are carefully allocated to satisfy write requests so as to reduce disturbance by using free or invalid sub-blocks as isolation layers among sub-blocks, without additional hardware cost and capacity loss. A series of experiments were conducted to evaluate the capability of the proposed design. The results show that the proposed design is very effective in improving the system performance by reducing garbage collection overheads and in improving the device reliability/lifetime.

原文English
主出版物標題2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781450330503
DOIs
出版狀態Published - 2016 11月 21
事件2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016 - Pittsburgh, United States
持續時間: 2016 10月 22016 10月 7

出版系列

名字2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016

Conference

Conference2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016
國家/地區United States
城市Pittsburgh
期間16-10-0216-10-07

All Science Journal Classification (ASJC) codes

  • 軟體
  • 硬體和架構
  • 控制與系統工程

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