摘要
An incremental poly etching method can improve the poly pimple defect-induced device mismatch on the static noise margin (SNM) of 65-nm-node low-power 6T-SRAM. The improvement on circuit level is examined by the yield of scan chain and memory built-in self-test (MBIST), which is known to correlate well to process-induced defects.
原文 | English |
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文章編號 | 5418971 |
頁(從 - 到) | 956-959 |
頁數 | 4 |
期刊 | IEEE Transactions on Electron Devices |
卷 | 57 |
發行號 | 4 |
DOIs | |
出版狀態 | Published - 2010 4月 |
All Science Journal Classification (ASJC) codes
- 電子、光磁材料
- 電氣與電子工程