Improving source/drain contact resistance of amorphous indium-gallium-zinc-oxide thin-film transistors using an n+-ZnO buffer layer

Chien Hsiung Hung, Shui Jinn Wang, Chieh Lin, Chien Hung Wu, Yen Han Chen, Pang Yi Liu, Yung Chun Tu, Tseng Hsing Lin

研究成果: Article

2 引文 斯高帕斯(Scopus)

摘要

To avoid high temperature annealing in improving the source/drain (S/D) resistance (RDS) of amorphous indium-gallium-zinc-oxide (-IGZO) thinfilm transistors (TFTs) for flexible electronics, a simple and efficient technique using a sputtering-deposited n+-ZnO buffer layer (BL) sandwiched between the S/D electrode and the IGZO channel is proposed and demonstrated. It shows that the RDS of IGZO TFTs with the proposed n+-ZnO BL is reduced to 8.1 ' 103 as compared with 6.1 ' 104 of the conventional one. The facilitation of carrier tunneling between the S/D electrode and the IGZO channel through the use of the n+-ZnO BL to lower the effective barrier height therein is responsible for the RDS reduction. Effects of the chamber pressure on the carrier concentration of the sputtering-deposited n+-ZnO BL and the thickness of the BL on the degree of improvement in the performance of IGZO TFTs are analyzed and discussed.

原文English
文章編號06GG05
期刊Japanese Journal of Applied Physics
55
發行號6
DOIs
出版狀態Published - 2016 六月

All Science Journal Classification (ASJC) codes

  • Engineering(all)
  • Physics and Astronomy(all)

指紋 深入研究「Improving source/drain contact resistance of amorphous indium-gallium-zinc-oxide thin-film transistors using an n<sup>+</sup>-ZnO buffer layer」主題。共同形成了獨特的指紋。

  • 引用此