Integrated switchable inductors with symmetric differential layout

Jia Lun Wang, Yan Ru Tzeng, Tzuen Hsi Huang

研究成果: Conference contribution

4 引文 斯高帕斯(Scopus)

摘要

An integrated switchable inductor with symmetric differential layout is proposed. It can be achieved over 50% area shrinkage as compared with the traditional ones. Three testkeys with a typical switch-ON inductance of about 2.1 nH (at 1.8 GHz) were pre-designed using an electromagnetic simulator and successfully verified by tsmc's 0.18 μm RF CMOS technology. The measured ON/OFF inductance values are of 2.1 nH / 2.7 nH, 2.1 nH / 2.4 nH and 2.0 nH / 2.2 nH; and the Q-factors are of 4.1 / 6.2, 4.6 / 6.1 and 5.1 / 6.1, respectively. The Q-factor degradation of proposed switchable inductors due to the different inner turn size effect is discussed and a simple inductor lumped-circuit model is proposed with a relatively reasonable accuracy up to 10 GHz. A VCO testkey with the integration of such switchable inductor is also demonstrated.

原文English
主出版物標題2006 Asia-Pacific Microwave Conference Proceedings, APMC
頁面1369-1372
頁數4
DOIs
出版狀態Published - 2006 十二月 1
事件2006 Asia-Pacific Microwave Conference, APMC - Yokohama, Japan
持續時間: 2006 十二月 122006 十二月 15

出版系列

名字Asia-Pacific Microwave Conference Proceedings, APMC
2

Other

Other2006 Asia-Pacific Microwave Conference, APMC
國家Japan
城市Yokohama
期間06-12-1206-12-15

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • 引用此

    Wang, J. L., Tzeng, Y. R., & Huang, T. H. (2006). Integrated switchable inductors with symmetric differential layout. 於 2006 Asia-Pacific Microwave Conference Proceedings, APMC (頁 1369-1372). [4429661] (Asia-Pacific Microwave Conference Proceedings, APMC; 卷 2). https://doi.org/10.1109/APMC.2006.4429661