Integration of current-reused VCO and frequency tripler for 24-GHz low-power phase-locked loop applications

Pei Kang Tsai, Tzuen-Hsi Huang

研究成果: Article

33 引文 斯高帕斯(Scopus)

摘要

This brief presents the integration of an 8-GHz voltage-controlled oscillator (VCO) and a frequency tripler for 24-GHz local oscillator generation. By stacking the VCO and the tripler with a current-reused topology, the power consumption of this integration can be saved. The proposed circuit with a total chip area of 0.7 mm × 0.8 mm is implemented in a 0.18- μm CMOS process. As the tuning voltage increases from 0 to 2 V, the measured frequency tuning range (FTR) of the VCO is from 7.06 to 8.33 GHz. The final resulting output frequency from the tripler ranges from 21.18 to 24.98 GHz (16.5% FTR). The core circuit totally consumes 5 mA from a 1.8-V supply voltage. The measured phase noises at the VCO and frequency tripler outputs are -113.76 and - 105.1 dBc/Hz at 1-MHz offset frequency, respectively, when V tune is 0 V. The best evaluated figure of merit with tuning is -187.2 dBc/Hz. This integration of a VCO and a frequency tripler exhibits a high potential for the use in low-power 24-GHz phase-locked loops.

原文English
文章編號6170549
頁(從 - 到)199-203
頁數5
期刊IEEE Transactions on Circuits and Systems II: Express Briefs
59
發行號4
DOIs
出版狀態Published - 2012 四月 1

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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