Impact of discrete doping in n-type gate-all-around silicon nanowire transistors is studied using 3D numerical simulation with quantum mechanical effect accounted for. We investigate the devices in the sub-22 nm technology node based on an assumption of sphere dopants with 1 nm diameter. Comprehensive study of equal random dopant probability in the channel is first reported. Our results show that the silicon nanowire FETs have more severe threshold variation when the random dopant is located in the centre of the channel than is located near source/drain boundary. The predicted threshold voltage variability ranges from 0.19 V to 0.26 V while most cases have threshold voltages below 0.23 V. The leakage current variability is within an order of magnitude and the output current variability is within one hundred micro amperes.
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