Investigation of step-doped channel heterostructure field-effect transistor

Wen Chau Liu, Lih Wen Laih, Jung Hui Tsai, Jing Yuh Chen, Wei Chou Wang, Po Hung Lin

研究成果: Paper

3 引文 (Scopus)

摘要

Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm2 gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage VT and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.

原文English
頁面251-254
頁數4
出版狀態Published - 1996 十二月 1
事件Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD - Canberra, Aust
持續時間: 1996 十二月 81996 十二月 11

Other

OtherProceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD
城市Canberra, Aust
期間96-12-0896-12-11

指紋

Transconductance
High electron mobility transistors
Threshold voltage
Electric breakdown
Networks (circuits)
Electric potential

All Science Journal Classification (ASJC) codes

  • Engineering(all)

引用此文

Liu, W. C., Laih, L. W., Tsai, J. H., Chen, J. Y., Wang, W. C., & Lin, P. H. (1996). Investigation of step-doped channel heterostructure field-effect transistor. 251-254. 論文發表於 Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD, Canberra, Aust, .
Liu, Wen Chau ; Laih, Lih Wen ; Tsai, Jung Hui ; Chen, Jing Yuh ; Wang, Wei Chou ; Lin, Po Hung. / Investigation of step-doped channel heterostructure field-effect transistor. 論文發表於 Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD, Canberra, Aust, .4 p.
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abstract = "Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm2 gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage VT and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.",
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Liu, WC, Laih, LW, Tsai, JH, Chen, JY, Wang, WC & Lin, PH 1996, 'Investigation of step-doped channel heterostructure field-effect transistor', 論文發表於 Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD, Canberra, Aust, 96-12-08 - 96-12-11 頁 251-254.

Investigation of step-doped channel heterostructure field-effect transistor. / Liu, Wen Chau; Laih, Lih Wen; Tsai, Jung Hui; Chen, Jing Yuh; Wang, Wei Chou; Lin, Po Hung.

1996. 251-254 論文發表於 Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD, Canberra, Aust, .

研究成果: Paper

TY - CONF

T1 - Investigation of step-doped channel heterostructure field-effect transistor

AU - Liu, Wen Chau

AU - Laih, Lih Wen

AU - Tsai, Jung Hui

AU - Chen, Jing Yuh

AU - Wang, Wei Chou

AU - Lin, Po Hung

PY - 1996/12/1

Y1 - 1996/12/1

N2 - Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm2 gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage VT and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.

AB - Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm2 gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage VT and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.

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Liu WC, Laih LW, Tsai JH, Chen JY, Wang WC, Lin PH. Investigation of step-doped channel heterostructure field-effect transistor. 1996. 論文發表於 Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD, Canberra, Aust, .