Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing

Shu Jenn Yu; Wei Chou Hsu; Yih Juan Li; Yeong Jia Chen

Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing

Shu Jenn Yu, Wei Chou Hsu, Yih Juan Li, Yeong Jia Chen

微電子工程研究所

研究成果: Conference contribution

摘要

In order to enhance the electron mobility we use step graded channel structure in the heterostructure field effect transistor to reduce Coulomb scattering. The electrons are far away from the AlGaAs/InGaAs interface. We fabricated successfully and obtained high drain current density and large gate voltage swing. For a 1.2×100 μm² gate dimension, the maximum saturation drain current density is 373 mA/mm and the maximum extrinsic transconductance is 148 mS/mm along with the gate voltage swing of 1.9V. Additionally, we use four period AlGaAs/GaAs buffer layer so that the variations of threshold voltages are insensitive to temperature.

原文	English
主出版物標題	Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004
編輯	X.P. Qu, G.P. Ru, B.Z. Li, B. Mizuno, H. Iwai
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	210-212
頁數	3
卷	4
ISBN（列印）	7309039157
出版狀態	Published - 2004
事件	Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 - Shanghai, China 持續時間: 2004 3月 15 → 2004 3月 16

Other

Other	Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004
國家/地區	China
城市	Shanghai
期間	04-03-15 → 04-03-16

All Science Journal Classification (ASJC) codes

一般工程

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引用此

Yu, S. J., Hsu, W. C., Li, Y. J., & Chen, Y. J. (2004). Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing. 於 X. P. Qu, G. P. Ru, B. Z. Li, B. Mizuno, & H. Iwai (編輯), Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 (卷 4, 頁 210-212). Institute of Electrical and Electronics Engineers Inc..

Yu, Shu Jenn ; Hsu, Wei Chou ; Li, Yih Juan 等. / Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing. Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004. 編輯 / X.P. Qu ; G.P. Ru ; B.Z. Li ; B. Mizuno ; H. Iwai. 卷 4 Institute of Electrical and Electronics Engineers Inc., 2004. 頁 210-212

@inproceedings{24b51960d1d3420cb7491683890ac853,

title = "Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing",

abstract = "In order to enhance the electron mobility we use step graded channel structure in the heterostructure field effect transistor to reduce Coulomb scattering. The electrons are far away from the AlGaAs/InGaAs interface. We fabricated successfully and obtained high drain current density and large gate voltage swing. For a 1.2×100 μm2 gate dimension, the maximum saturation drain current density is 373 mA/mm and the maximum extrinsic transconductance is 148 mS/mm along with the gate voltage swing of 1.9V. Additionally, we use four period AlGaAs/GaAs buffer layer so that the variations of threshold voltages are insensitive to temperature.",

author = "Yu, {Shu Jenn} and Hsu, {Wei Chou} and Li, {Yih Juan} and Chen, {Yeong Jia}",

year = "2004",

language = "English",

isbn = "7309039157",

volume = "4",

pages = "210--212",

editor = "X.P. Qu and G.P. Ru and B.Z. Li and B. Mizuno and H. Iwai",

booktitle = "Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 ; Conference date: 15-03-2004 Through 16-03-2004",

}

Yu, SJ, Hsu, WC, Li, YJ & Chen, YJ 2004, Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing. 於 XP Qu, GP Ru, BZ Li, B Mizuno & H Iwai (編輯), Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004. 卷 4, Institute of Electrical and Electronics Engineers Inc., 頁 210-212, Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004, Shanghai, China, 04-03-15.

Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing. / Yu, Shu Jenn; Hsu, Wei Chou; Li, Yih Juan 等.
Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004. 編輯 / X.P. Qu; G.P. Ru; B.Z. Li; B. Mizuno; H. Iwai. 卷 4 Institute of Electrical and Electronics Engineers Inc., 2004. p. 210-212.

研究成果: Conference contribution

TY - GEN

T1 - Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing

AU - Yu, Shu Jenn

AU - Hsu, Wei Chou

AU - Li, Yih Juan

AU - Chen, Yeong Jia

PY - 2004

Y1 - 2004

N2 - In order to enhance the electron mobility we use step graded channel structure in the heterostructure field effect transistor to reduce Coulomb scattering. The electrons are far away from the AlGaAs/InGaAs interface. We fabricated successfully and obtained high drain current density and large gate voltage swing. For a 1.2×100 μm2 gate dimension, the maximum saturation drain current density is 373 mA/mm and the maximum extrinsic transconductance is 148 mS/mm along with the gate voltage swing of 1.9V. Additionally, we use four period AlGaAs/GaAs buffer layer so that the variations of threshold voltages are insensitive to temperature.

AB - In order to enhance the electron mobility we use step graded channel structure in the heterostructure field effect transistor to reduce Coulomb scattering. The electrons are far away from the AlGaAs/InGaAs interface. We fabricated successfully and obtained high drain current density and large gate voltage swing. For a 1.2×100 μm2 gate dimension, the maximum saturation drain current density is 373 mA/mm and the maximum extrinsic transconductance is 148 mS/mm along with the gate voltage swing of 1.9V. Additionally, we use four period AlGaAs/GaAs buffer layer so that the variations of threshold voltages are insensitive to temperature.

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UR - http://www.scopus.com/inward/citedby.url?scp=3543103285&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:3543103285

SN - 7309039157

VL - 4

SP - 210

EP - 212

BT - Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004

A2 - Qu, X.P.

A2 - Ru, G.P.

A2 - Li, B.Z.

A2 - Mizuno, B.

A2 - Iwai, H.

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004

Y2 - 15 March 2004 through 16 March 2004

ER -

Investigation of step graded channel heterostructure field effect transistor with high gate voltage swing

摘要

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