In this paper, we introduce a new test paradigm called indirect-access scan test, demonstrated over the HOY test platform . Unlike the traditional ATE-based testing, the test data in this paradigm are sent to the chip under test via packets over a single indirect channel. Although there is extra test time overhead for establishing the store-and-forward communication, it offers almost unlimited test memory - a highly desirable property since the large volume of test data today could easily blow up a traditional ATE's test memory. In addition to demonstrating the feasibility of this new paradigm, we also show that its efficiency can be substantially improved by two schemes; i.e., primary input (PI) data encoding and dynamic packet formatting. For a design with 155K gates, the speed-up achieved can be more than 50X.