Local binary pattern circuit generator with adjustable parameters for feature extraction

Min Chun Hu, Kiat Siong Ng, Pei Yin Chen, Yu Jung Hsiao, Cheng Hsien Li

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

In the field of computer vision, local binary pattern (LBP) is one of the most popular feature extraction method and has been used in many object detection frameworks. To efficiently extract LBP features in high-resolution images, hardware architecture is needed to disperse CPU burden and to improve the entire object detection performance. In this paper, a hardware implementation of an approximated LBP method with adjustable parameters is introduced. For simulation, Taiwan Semiconductor Manufacturing Company 0.18μm technology is used to implement the LBP hardware, and the hardware can achieve 500 MHz with lower gate count than previous study. The proposed LBP circuit is applied to the pedestrian classification application and the evaluation results show that the approximated LBP values generated by our circuit can achieve comparable classification accuracy with the primitive LBP method. Additionally, the proposed LBP hardware provides adjustable parameters to fit different applications while requires fewer hardware costs as compared with the existing work.

原文English
文章編號8085401
頁(從 - 到)2582-2591
頁數10
期刊IEEE Transactions on Intelligent Transportation Systems
19
發行號8
DOIs
出版狀態Published - 2018 八月

All Science Journal Classification (ASJC) codes

  • 汽車工程
  • 機械工業
  • 電腦科學應用

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