Low power design of phase-change memory based on a comprehensive model

M. H. Chiang; Y. B. Liao; J. T. Lin; W. C. Hsu; C. Yu; P. C. Chiang; Y. Y. Hsu; W. H. Liu; S. S. Sheu; K. Li Su; M. J. Kao; M. J. Tsai

doi:10.1049/iet-cdt.2009.0037

Low power design of phase-change memory based on a comprehensive model

M. H. Chiang
, Y. B. Liao
, J. T. Lin
, W. C. Hsu
, C. Yu
, P. C. Chiang
, Y. Y. Hsu
, W. H. Liu
, S. S. Sheu
, K. Li Su
, M. J. Kao
, M. J. Tsai

研究成果: Article › 同行評審

摘要

In this study, the authors propose non-conventional phase-change memory programming schemes using a comprehensive model, which integrates the underlying electrical and thermal theories. Various pulsing schemes aiming to reduce operation power without compromising performance are assessed based on a calibrated model. Our results suggest that optimisation of power consumption can be done simply by design of pulsing techniques.

原文	English
文章編號	ICDTA6000004000004000285000001
頁（從 - 到）	285-292
頁數	8
期刊	IET Computers and Digital Techniques
卷	4
發行號	4
DOIs	https://doi.org/10.1049/iet-cdt.2009.0037
出版狀態	Published - 2010 7月

All Science Journal Classification (ASJC) codes

軟體
硬體和架構
電氣與電子工程

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10.1049/iet-cdt.2009.0037

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AU - Liao, Y. B.

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AU - Yu, C.

AU - Chiang, P. C.

AU - Hsu, Y. Y.

AU - Liu, W. H.

AU - Sheu, S. S.

AU - Su, K. Li

AU - Kao, M. J.

AU - Tsai, M. J.

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AB - In this study, the authors propose non-conventional phase-change memory programming schemes using a comprehensive model, which integrates the underlying electrical and thermal theories. Various pulsing schemes aiming to reduce operation power without compromising performance are assessed based on a calibrated model. Our results suggest that optimisation of power consumption can be done simply by design of pulsing techniques.

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Low power design of phase-change memory based on a comprehensive model

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