Low Power Sigma-Delta Modulator Architecture Capable of Correcting Dynamic Range Automatically, Method for Implementing Low Power Circuit Thereof, and Method for Correcting and Extending Dynamic Range of Sigma-Delta Modulator Automatically

貢獻的翻譯標題: 自動校正動態範圍之低功耗三角積分調變器架構及其低功耗電路實現方法與自動校正且延伸三角積分調變器動態範圍之方法

Shuenn-Yuh Lee (Inventor)

研究成果: Patent

摘要

A low power consumption sigma-delta modulator architecture capable of dynamic detection of output signal strength to change dynamic range, a method for implementing low power consumption circuit thereof, and a method for automatically correcting and extending dynamic range of the sigma-delta modulator are provided. An automatic correction unit is utilized to detect system output signal strength of the sigma-delta modulator, compare system input signal specifications to come out multiple sets of dynamic range curves, and thereby extract an appropriate combination of system order and feed-forward coefficients so as to extend the system dynamic range. The circuit architecture of the automatic correction unit is in a digital circuit form, including a digital signal processor, a counter and register array, a comparator, a digital coefficient controller, a feed-forward gain control unit and a system order control unit.
貢獻的翻譯標題自動校正動態範圍之低功耗三角積分調變器架構及其低功耗電路實現方法與自動校正且延伸三角積分調變器動態範圍之方法
原文English
專利號9634683
出版狀態Published - 1800

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